The adoption of Systems-on-a-Chip (SoCs) in automotive systems opens interesting possibilities, but also introduces significant dependability concerns. Up to now, researchers focused most of their efforts in devising new solutions for improving the dependability of the processor-cores embedded in typical SoCs, and several solutions mixing software techniques with hardware ones have been proposed, which result in low-cost dependable systems. Conversely, the peripheral components also typically embedded in SoCs are often designed according to traditional area-demanding hardware-only fault tolerance techniques.

In this paper, we propose an experimental evaluation of the effectiveness of a purely software-based approach, which can be easily and inexpensively implemented on existing SoCs. We present results on a case study inspired to a real-life application, which exploits a network of SoCs based on the Motorola 6809 processor core: experiments show that the approach achieves relatively high fault coverage with relatively reduced performance penalties.