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Sixth International Workshop on Microprocessor Test and Verification (MTV'05)
A Pseudo-Deterministic Functional ATPG based on EFSM Traversing
Austin, Texas
November 03-November 05
ISBN: 0-7695-2627-6
G. Di Guglielmo, Universita di Verona, Italy
F. Fummi, Universita di Verona, Italy
C. Marconcini, Universita di Verona, Italy
G. Pravadelli, Universita di Verona, Italy
This paper presents a functional ATPG framework which exploits the extended finite state machine (EFSM) model to pseudodeterministically generate test sequences. A constraint solver or a SAT-solver is used to generate test vectors that allow us to uniformly traverse the state space of the design under test (DUT). This definitely increases the ability of the ATPG to observe and control hard-to-detect faults.
Citation:
G. Di Guglielmo, F. Fummi, C. Marconcini, G. Pravadelli, "A Pseudo-Deterministic Functional ATPG based on EFSM Traversing," mtv, pp.70-75, Sixth International Workshop on Microprocessor Test and Verification (MTV'05), 2005
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