In the past performance counters have been available to top-end microprocessors as hardware luxuries for profiling critical applications. Today, on the contrary, several desktop microprocessors contain hardware support for monitoring performance events. This paper proposes a new approach to automatic test program generation that exploits such hardware to monitor specific micro-architectural events. In the approach, the generation tool repeatedly evaluates and improves candidate programs directly running on the target microprocessor: candidate programs are not "simulated", but rather "executed". The fast evaluation of candidate tests enables the use of an automatic methodology even on large designs. As a case study, an experiment targeting the Intel? Pentium? 4 microprocessor is reported.