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Fifth International Workshop on Microprocessor Test and Verification (MTV'04)
On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification
Austin, Texas
September 09-September 10
ISBN: 0-7695-2320-X
ASCII Text
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Marc Herbstritt, Thomas Kmieciak, Bernd Becker, "On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification," Microprocessor Test and Verification, International Workshop on, pp. 50-55, Fifth International Workshop on Microprocessor Test and Verification (MTV'04), 2004.
 
 
BibTex
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@article{ 10.1109/MTV.2004.18,
author = {Marc Herbstritt and Thomas Kmieciak and Bernd Becker},
title = {On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification},
journal ={Microprocessor Test and Verification, International Workshop on},
volume = {0},
year = {2004},
issn = {1550-4093},
pages = {50-55},
doi = {http://doi.ieeecomputersociety.org/10.1109/MTV.2004.18},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Microprocessor Test and Verification, International Workshop on
TI - On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification
SN - 1550-4093
SP50
EP55
A1 - Marc Herbstritt,
A1 - Thomas Kmieciak,
A1 - Bernd Becker,
PY - 2004
KW - null
VL - 0
JA - Microprocessor Test and Verification, International Workshop on
ER -
 
Marc Herbstritt, Albert-Ludwigs-University
Thomas Kmieciak, Albert-Ludwigs-University
Bernd Becker, Albert-Ludwigs-University
In this work we present an approach for SAT-based combinational circuit verification using partitionings of the set of primary outputs. We formally analyze the applied partitioning heuristics for the first time and present a closed verification framework incorporating traditional techniques. We report on experiments using our partitioning-based verification procedure that result in speedups of 276% on the average compared to traditional techniques.
Citation:
Marc Herbstritt, Thomas Kmieciak, Bernd Becker, "On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification," mtv, pp.50-55, Fifth International Workshop on Microprocessor Test and Verification (MTV'04), 2004
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