Fourth International Workshop on Microprocessor Test and Verification Common Challenges and Solutions Testing the Path Delay Faults of ISCAS85 Circuit c6288 Hyatt Town Lake Hotel, Austin, Texas May 29-May 30 ISBN: 0-7695-2045-6
It is known that the ISCAS85 circuit c6288 contains an exponential number of paths and more than 99% of the path delay faults are untestable. Most ATPG tools which can efficiently handle other circuits fail on c6288. In this paper the logic structure of c6288 is studied and the main features which cause false paths are revealed. A heuristic which significantly helps the path delay fault test generation for this circuit is presented. Experimental results show that our methodology is able to efficiently generate testable paths for c6288.
Citation:
Wangqi Qiu, D. M. H. Walker, "Testing the Path Delay Faults of ISCAS85 Circuit c6288," mtv, pp.19, Fourth International Workshop on Microprocessor Test and Verification Common Challenges and Solutions, 2003 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb