2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) Taipei, Taiwan August 02-August 04 ISBN: 0-7695-2572-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTDT.2006.21
Non-volatile semiconductor memory, especially Flash memory has seen explosive growth in recent years because of unceasing demand for higher performance and density for cell phone, digital still camera, camcorder, MP3, consumer electronics and automotive applications. Despite the rosy outlook, both NOR and NAND Flash technologies face steep challenges to further scale down into the sub-45nm nodes. At 45nm node both technologies confront fundamental physics limitations - the non-scalability of tunnel oxide and cross talk between floating gates. This paper examines the scaling limits for Flash memories and surveys potential solutions that promise to carry nonvolatile memories further down the Moore?s curve at 32nm node and beyond.
Citation:
Chih-Yuan Lu, "Non-volatile Semiconductor Memory Technology in Nanotech Era," mtdt, pp.xiv, 2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||