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2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)
FlexiVia ROM Compiler Programmable on Different Via Layers Based on Top Metal Assignment
Taipei, Taiwan
August 02-August 04
ISBN: 0-7695-2572-5
ASCII Text
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Ding-Ming Kwai, Yung-Fa Chou, Meng-Fan Chang, Su-Meng Yang, Ding-Sheng Chen, Min-Chung Hsu, Yu-Zhen Liao, Shiao-Yi Lin, Yu-Ling Sung, Chia-Hsin Lee, Hsin-Kun Hsu, "FlexiVia ROM Compiler Programmable on Different Via Layers Based on Top Metal Assignment," Memory Technology, Design and Testin, IEEE International Workshop on, pp. 28-33, 2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06), 2006.
 
 
BibTex
x
 
@article{ 10.1109/MTDT.2006.14,
author = {Ding-Ming Kwai and Yung-Fa Chou and Meng-Fan Chang and Su-Meng Yang and Ding-Sheng Chen and Min-Chung Hsu and Yu-Zhen Liao and Shiao-Yi Lin and Yu-Ling Sung and Chia-Hsin Lee and Hsin-Kun Hsu},
title = {FlexiVia ROM Compiler Programmable on Different Via Layers Based on Top Metal Assignment},
journal ={Memory Technology, Design and Testin, IEEE International Workshop on},
volume = {0},
year = {2006},
issn = {1087-4852},
pages = {28-33},
doi = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2006.14},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Memory Technology, Design and Testin, IEEE International Workshop on
TI - FlexiVia ROM Compiler Programmable on Different Via Layers Based on Top Metal Assignment
SN - 1087-4852
SP28
EP33
A1 - Ding-Ming Kwai,
A1 - Yung-Fa Chou,
A1 - Meng-Fan Chang,
A1 - Su-Meng Yang,
A1 - Ding-Sheng Chen,
A1 - Min-Chung Hsu,
A1 - Yu-Zhen Liao,
A1 - Shiao-Yi Lin,
A1 - Yu-Ling Sung,
A1 - Chia-Hsin Lee,
A1 - Hsin-Kun Hsu,
PY - 2006
KW - null
VL - 0
JA - Memory Technology, Design and Testin, IEEE International Workshop on
ER -
 
Ding-Ming Kwai, Intellectual Property Library Company Hsinchu, Taiwan
Yung-Fa Chou, National Tsing Hua Univerity Hsinchu, Taiwan
Meng-Fan Chang, Intellectual Property Library Company Hsinchu, Taiwan
Su-Meng Yang, Intellectual Property Library Company Hsinchu, Taiwan
Ding-Sheng Chen, Intellectual Property Library Company Hsinchu, Taiwan
Min-Chung Hsu, Intellectual Property Library Company Hsinchu, Taiwan
Yu-Zhen Liao, Intellectual Property Library Company Hsinchu, Taiwan
Shiao-Yi Lin, Intellectual Property Library Company Hsinchu, Taiwan
Yu-Ling Sung, Intellectual Property Library Company Hsinchu, Taiwan
Chia-Hsin Lee, Intellectual Property Library Company Hsinchu, Taiwan
Hsin-Kun Hsu, Intellectual Property Library Company Hsinchu, Taiwan
We present a ROM compiler programmable from via 1 to via n - 2, where n is the number of metal layers. The layer on which the code via is landed can be selected by the user. With the coding being able to take place as close to the topmost metal as possible, the turnaround time for a revision is shortened. In this paper, we discuss the array assembly scheme and its impacts on the design considerations by the choice of strapping period.
Citation:
Ding-Ming Kwai, Yung-Fa Chou, Meng-Fan Chang, Su-Meng Yang, Ding-Sheng Chen, Min-Chung Hsu, Yu-Zhen Liao, Shiao-Yi Lin, Yu-Ling Sung, Chia-Hsin Lee, Hsin-Kun Hsu, "FlexiVia ROM Compiler Programmable on Different Via Layers Based on Top Metal Assignment," mtdt, pp.28-33, 2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06), 2006
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