Records of the 2004 International Workshop on Memory Technology, Design and Testing (MTDT'04) An Integrated Memory Self Test and EDA Solution San Jose, California, USA August 09-August 10 ISBN: 0-7695-2193-2
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTDT.2004.5
Memory built-in self-test (BIST) is a critical portion of the chip design and electronic design automation (EDA) flow. A BIST tool needs to understand the memory at the topological and layout levels in order to test for the correct fault models. The BIST also needs to be fully integrated into the overall EDA flow in order to have the least impact on chip area and have the greatest ease of use to the chip designer.
Citation:
R. Dean Adams, Robert Abbott, Xiaoliang Bai, Dwayne Burek, Eric MacDonald, "An Integrated Memory Self Test and EDA Solution," mtdt, pp.92-95, Records of the 2004 International Workshop on Memory Technology, Design and Testing (MTDT'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||