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2003 International Workshop on Memory Technology, Design and Testing (MTDT'03)
Output Timing Measurement Using an Idd Method
San Jose, California
July 28-July 29
ISBN: 0-7695-2004-9
ASCII Text
x 
 
Joerg Vollrath, "Output Timing Measurement Using an Idd Method," Memory Technology, Design and Testin, IEEE International Workshop on, pp. 43, 2003 International Workshop on Memory Technology, Design and Testing (MTDT'03), 2003.
 
 
BibTex
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@article{ 10.1109/MTDT.2003.1222359,
author = {Joerg Vollrath},
title = {Output Timing Measurement Using an Idd Method},
journal ={Memory Technology, Design and Testin, IEEE International Workshop on},
volume = {0},
year = {2003},
issn = {1087-4852},
pages = {43},
doi = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2003.1222359},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Memory Technology, Design and Testin, IEEE International Workshop on
TI - Output Timing Measurement Using an Idd Method
SN - 1087-4852
SP
EP
A1 - Joerg Vollrath,
PY - 2003
KW - DRAM
KW - timing
KW - DDR
VL - 0
JA - Memory Technology, Design and Testin, IEEE International Workshop on
ER -
 
Joerg Vollrath, Infineon Technologies
The exact placement of the data output eye for high speed single and double data rate (SDR, DDR) synchronous dynamic random access memories (SDRAM) allows high speed operation. For the timing measurement method via current presented in this paper the tester drives data at the same time as the device. The current consumption of the device is depending on the overlap of the tester output waveform and the waveform of the data driven by the device under test (DUT). This paper presents the measurement method and results from a 128M x4 SDRAM and compares them to a traditional approach using a data strobe.
Index Terms:
DRAM, timing, DDR
Citation:
Joerg Vollrath, "Output Timing Measurement Using an Idd Method," mtdt, pp.43, 2003 International Workshop on Memory Technology, Design and Testing (MTDT'03), 2003
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