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2005 IEEE International Conference on Microelectronic Systems Education (MSE'05)
Anaheim, California, USA
June 12-June 13
ISBN: 0-7695-2374-9
Johannes Grad, Illinois Institute of Technology and Cadence Design Systems
James E. Stine, Illinois Institute of Technology
David D. Neiman, Cadence Design Systems
System-on-Chip design is an important new trend in the design of complex integrated circuits. The integration of a microprocessor, memory and peripherals onto a single die opens new possibilities, but also presents new design challenges. Teaching system-on-chip design techniques to students requires not only CAD software but also design libraries and HDL code blocks. This paper presents a reference system-on-chip design as well as a set of training materials. The design is a dual-processor SOC with several peripheral blocks. It is based on a generic 180nm process design kit and cell library. All materials are available at no charge to students and universities.
Citation:
Johannes Grad, James E. Stine, David D. Neiman, "Real World SOC Experience for the Classroom," mse, pp.49-50, 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05), 2005
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