RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool

M
MSE
2003
2003 International Conference on Microelectronics Systems Education (MSE'03)
Abstract - RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool

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2003 International Conference on Microelectronics Systems Education (MSE'03)

RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool (PDF)

Anaheim, California

June 01-June 02

ISBN: 0-7695-1973-3

	ASCII Text	x
	Jayanta Mukherjee, Jason Parry, WenHua Dai, Patrick Roblin, Steven Bibyk, Jongsoo Lee, "RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool," Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on, pp. 76, 2003 International Conference on Microelectronics Systems Education (MSE'03), 2003.

	BibTex	x
	@article{ 10.1109/MSE.2003.1205262, author = {Jayanta Mukherjee and Jason Parry and WenHua Dai and Patrick Roblin and Steven Bibyk and Jongsoo Lee}, title = {RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool}, journal ={Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on}, volume = {0}, year = {2003}, isbn = {0-7695-1973-3}, pages = {76}, doi = {http://doi.ieeecomputersociety.org/10.1109/MSE.2003.1205262}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on TI - RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool SN - 0-7695-1973-3 SP EP A1 - Jayanta Mukherjee, A1 - Jason Parry, A1 - WenHua Dai, A1 - Patrick Roblin, A1 - Steven Bibyk, A1 - Jongsoo Lee, PY - 2003 KW - null VL - 0 JA - Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on ER -

Jayanta Mukherjee, The Ohio State University

Jason Parry, The Ohio State University

WenHua Dai, The Ohio State University

Patrick Roblin, The Ohio State University

Steven Bibyk, The Ohio State University

Jongsoo Lee, The Ohio State University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MSE.2003.1205262

This paper describes the use of the newly developed Cadence to ADS dynamic link in loadpull simulations for BiCMOS RFIC design in a University environment. The process described here helps a designer achieve an integrated design environment where both RF design and traditional VLSI design principles can be applied in an integrated manner.

Citation:

Jayanta Mukherjee, Jason Parry, WenHua Dai, Patrick Roblin, Steven Bibyk, Jongsoo Lee, "RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool," mse, pp.76, 2003 International Conference on Microelectronics Systems Education (MSE'03), 2003

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