Using an FPGA-based SOC Approach for Senior Design Projects

M
MSE
2003
2003 International Conference on Microelectronics Systems Education (MSE'03)
Abstract - Using an FPGA-based SOC Approach for Senior Design Projects

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2003 International Conference on Microelectronics Systems Education (MSE'03)

Using an FPGA-based SOC Approach for Senior Design Projects (PDF)

Anaheim, California

June 01-June 02

ISBN: 0-7695-1973-3

	ASCII Text	x
	James O. Hamblen, "Using an FPGA-based SOC Approach for Senior Design Projects," Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on, pp. 18, 2003 International Conference on Microelectronics Systems Education (MSE'03), 2003.

	BibTex	x
	@article{ 10.1109/MSE.2003.1205235, author = {James O. Hamblen}, title = {Using an FPGA-based SOC Approach for Senior Design Projects}, journal ={Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on}, volume = {0}, year = {2003}, isbn = {0-7695-1973-3}, pages = {18}, doi = {http://doi.ieeecomputersociety.org/10.1109/MSE.2003.1205235}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on TI - Using an FPGA-based SOC Approach for Senior Design Projects SN - 0-7695-1973-3 SP EP A1 - James O. Hamblen, PY - 2003 KW - null VL - 0 JA - Microelectronics Systems Education, IEEE International Conference on/Multimedia Software Engineering, International Symposium on ER -

James O. Hamblen, Georgia Institute of Technology

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MSE.2003.1205235

This paper describes our experiences using a SOC approach to develop capstone design projects for undergraduate students in our electrical and computer engineering curriculum. A commercial FPGA-based SOC development board with a RISC processor IP core is used to support a wide variety of student design projects. A top-down rapid prototyping approach with commercial CAD tools, a C compiler targeted for the RISC processor IP core, and a large field-programmable logic device (FPLD) is used for team-based design projects.

Citation:

James O. Hamblen, "Using an FPGA-based SOC Approach for Senior Design Projects," mse, pp.18, 2003 International Conference on Microelectronics Systems Education (MSE'03), 2003

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