Trading Off Cache Capacity for Low-Voltage Operation January/February 2009 (vol. 29 no. 1) pp. 96-103
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2009.20
Two proposed techniques let microprocessors operate at low voltages despite high memory-cell failure rates. They identify and disable defective portions of the cache at two granularities: individual words or pairs of bits. Both techniques use the entire cache during high-voltage operation while sacrificing cache capacity during low-voltage operation to reduce the minimum voltage below 500 mV. 1. Y. Taur and T.H. Ning, Fundamentals of Modern VLSI Devices, Cambridge Univ. Press, 1998, pp. 144.
Index Terms:
cache, low-voltage
Citation:
Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad Khellah, Shih-Lien Lu, "Trading Off Cache Capacity for Low-Voltage Operation," IEEE Micro, vol. 29, no. 1, pp. 96-103, Jan./Feb. 2009, doi:10.1109/MM.2009.20 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||