Guest Editors' Introduction: On-Chip Interconnects for Multicores

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Guest Editors' Introduction: On-Chip Interconnects for Multicores (HTML)

September/October 2007 (vol. 27 no. 5)

pp. 3-5

	ASCII Text	x
	Partha Kundu, Li-Shiuan Peh, "Guest Editors' Introduction: On-Chip Interconnects for Multicores," IEEE Micro, vol. 27, no. 5, pp. 3-5, September/October, 2007.

	BibTex	x
	@article{ 10.1109/MM.2007.85, author = {Partha Kundu and Li-Shiuan Peh}, title = {Guest Editors' Introduction: On-Chip Interconnects for Multicores}, journal ={IEEE Micro}, volume = {27}, number = {5}, issn = {0272-1732}, year = {2007}, pages = {3-5}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2007.85}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - Guest Editors' Introduction: On-Chip Interconnects for Multicores IS - 5 SN - 0272-1732 SP3 EP5 EPD - 3-5 A1 - Partha Kundu, A1 - Li-Shiuan Peh, PY - 2007 KW - on-chip interconnection networks KW - network on chip KW - system on chip KW - embedded systems KW - multicore architectures VL - 27 JA - IEEE Micro ER -

Partha Kundu, Intel

Li-Shiuan Peh, Princeton University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2007.85

This special issue of IEEE Micro brings readers the latest advances in the field of on-chip interconnects for multicores. The guest editors specifically selected articles to focus on novel on-chip networks realized on actual silicon--partly to showcase a few silicon prototypes of on-chip networks being used in multicore processors and SoCs; partly to bring to attention the implementation issues facing architects and designers. Along with six articles that gather insights from the designers of actual on-chip interconnects for multicores, the special issue includes two articles that delve into the design infrastructure support for on-chip networks and an article that summarizes the grand research challenges for realizing next-generation on-chip networks and multicores.

Index Terms:

on-chip interconnection networks, network on chip, system on chip, embedded systems, multicore architectures

Citation:

Partha Kundu, Li-Shiuan Peh, "Guest Editors' Introduction: On-Chip Interconnects for Multicores," IEEE Micro, vol. 27, no. 5, pp. 3-5, Sep./Oct. 2007, doi:10.1109/MM.2007.85

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