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The Blackford Northbridge Chipset for the Intel 5000
March/April 2007 (vol. 27 no. 2)
pp. 22-33
ASCII Text
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Sivakumar Radhakrishnan, Sundaram Chinthamani, Kai Cheng, "The Blackford Northbridge Chipset for the Intel 5000," IEEE Micro, vol. 27, no. 2, pp. 22-33, March/April, 2007.
 
 
BibTex
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@article{ 10.1109/MM.2007.44,
author = {Sivakumar Radhakrishnan and Sundaram Chinthamani and Kai Cheng},
title = {The Blackford Northbridge Chipset for the Intel 5000},
journal ={IEEE Micro},
volume = {27},
number = {2},
issn = {0272-1732},
year = {2007},
pages = {22-33},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2007.44},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - The Blackford Northbridge Chipset for the Intel 5000
IS - 2
SN - 0272-1732
SP22
EP33
EPD - 22-33
A1 - Sivakumar Radhakrishnan,
A1 - Sundaram Chinthamani,
A1 - Kai Cheng,
PY - 2007
KW - platform architecture
KW - shared memory
KW - dual-processor system
KW - northbridge chipset
KW - low-power design
KW - I/O bridges
KW - FB-DIMM memory technology
VL - 27
JA - IEEE Micro
ER -
 
The Intel 5000 is a shared-memory, symmetric dual-processor system based on the energy-efficient, high-performance Intel Core 2 dual- and quad-core processors. A key component is the northbridge, which interconnects processor, memory, and I/O interfaces. The Blackford northbridge chipset provides multicore processor support and platform-level features and technologies. Its critical microarchitectural improvements offer significant performance advantages.
Index Terms:
platform architecture, shared memory, dual-processor system, northbridge chipset, low-power design, I/O bridges, FB-DIMM memory technology
Citation:
Sivakumar Radhakrishnan, Sundaram Chinthamani, Kai Cheng, "The Blackford Northbridge Chipset for the Intel 5000," IEEE Micro, vol. 27, no. 2, pp. 22-33, Mar./Apr. 2007, doi:10.1109/MM.2007.44
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