RAMP: Research Accelerator for Multiple Processors

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March/April 2007 (vol. 27 no. 2)

pp. 46-57

	ASCII Text	x
	John Wawrzynek, David Patterson, Mark Oskin, Shih-Lien Lu, Christoforos Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanović, "RAMP: Research Accelerator for Multiple Processors," IEEE Micro, vol. 27, no. 2, pp. 46-57, March/April, 2007.

	BibTex	x
	@article{ 10.1109/MM.2007.39, author = {John Wawrzynek and David Patterson and Mark Oskin and Shih-Lien Lu and Christoforos Kozyrakis and James C. Hoe and Derek Chiou and Krste Asanović}, title = {RAMP: Research Accelerator for Multiple Processors}, journal ={IEEE Micro}, volume = {27}, number = {2}, issn = {0272-1732}, year = {2007}, pages = {46-57}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2007.39}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - RAMP: Research Accelerator for Multiple Processors IS - 2 SN - 0272-1732 SP46 EP57 EPD - 46-57 A1 - John Wawrzynek, A1 - David Patterson, A1 - Mark Oskin, A1 - Shih-Lien Lu, A1 - Christoforos Kozyrakis, A1 - James C. Hoe, A1 - Derek Chiou, A1 - Krste Asanović, PY - 2007 KW - hardware-software codesign KW - transactional memory KW - distributed systems KW - distributed-shared memory KW - parallel architectures KW - emulation KW - field-programmable gate arrays KW - modeling of computer architecture KW - integration VL - 27 JA - IEEE Micro ER -

John Wawrzynek, University of California, Berkeley

David Patterson, University of California, Berkeley

Mark Oskin, University of Washington

Shih-Lien Lu, Intel

Christoforos Kozyrakis, Stanford University

James C. Hoe, Carnegie Mellon University

Derek Chiou, University of Texas at Austin

Krste Asanović, Massachusetts Institute of Technology

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2007.39

The RAMP project's goal is to enable the intensive, multidisciplinary innovation that the computing industry will need to tackle the problems of parallel processing. RAMP itself is an open-source, community-developed, FPGA-based emulator of parallel architectures. Its design framework lets a large, collaborative community develop and contribute reusable, composable design modules. Three complete designs--for transactional memory, distributed systems, and distributed-shared memory--demonstrate the platform's potential.

Index Terms:

hardware-software codesign, transactional memory, distributed systems, distributed-shared memory, parallel architectures, emulation, field-programmable gate arrays, modeling of computer architecture, integration

Citation:

John Wawrzynek, David Patterson, Mark Oskin, Shih-Lien Lu, Christoforos Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanović, "RAMP: Research Accelerator for Multiple Processors," IEEE Micro, vol. 27, no. 2, pp. 46-57, Mar./Apr. 2007, doi:10.1109/MM.2007.39

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