Transactional Memory: The Hardware-Software Interface January/February 2007 (vol. 27 no. 1) pp. 67-76
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2007.26
This comprehensive architecture supports nested transactions, transaction handling, and two-phase commit. The result is a seamless integration of transactional memory with modern programming languages and runtime environments.
Index Terms:
hardware/software interfaces, parallel architectures, transactional memory
Citation:
Austen McDonald, Brian D. Carlstrom, JaeWoong Chung, Chi Cao Minh, Hassan Chafi, Christos Kozyrakis, Kunle Olukotun, "Transactional Memory: The Hardware-Software Interface," IEEE Micro, vol. 27, no. 1, pp. 67-76, Jan./Feb. 2007, doi:10.1109/MM.2007.26 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||