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3D Integration for Introspection
January/February 2007 (vol. 27 no. 1)
pp. 77-83
ASCII Text
x 
 
Shashidhar Mysore, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Kaustav Banerjee, Timothy Sherwood, "3D Integration for Introspection," IEEE Micro, vol. 27, no. 1, pp. 77-83, January/February, 2007.
 
 
BibTex
x
 
@article{ 10.1109/MM.2007.1,
author = {Shashidhar Mysore and Banit Agrawal and Navin Srivastava and Sheng-Chih Lin and Kaustav Banerjee and Timothy Sherwood},
title = {3D Integration for Introspection},
journal ={IEEE Micro},
volume = {27},
number = {1},
issn = {0272-1732},
year = {2007},
pages = {77-83},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2007.1},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - 3D Integration for Introspection
IS - 1
SN - 0272-1732
SP77
EP83
EPD - 77-83
A1 - Shashidhar Mysore,
A1 - Banit Agrawal,
A1 - Navin Srivastava,
A1 - Sheng-Chih Lin,
A1 - Kaustav Banerjee,
A1 - Timothy Sherwood,
PY - 2007
KW - performance evaluation
KW - profiling
KW - 3D interconnect
KW - debugging
KW - testing
KW - 3D stacking
VL - 27
JA - IEEE Micro
ER -
 
Shashidhar Mysore, University of California, Santa Barbara
Banit Agrawal, University of California, Santa Barbara
Navin Srivastava, University of California, Santa Barbara
Sheng-Chih Lin, University of California, Santa Barbara
Kaustav Banerjee, University of California, Santa Barbara
Timothy Sherwood, University of California, Santa Barbara
In today's complex processors, specialized profiling and introspection hardware would be incredibly beneficial to software developers, but most proposals for its addition would increase the cost of every die manufactured. Modular, "snap-on" analysis hardware, stacked vertically with the processor die using a 3D interconnect, could be included with developer systems to assist in debugging and testing, and omitted from consumer systems to keep them economically competitive.
Index Terms:
performance evaluation, profiling, 3D interconnect, debugging, testing, 3D stacking
Citation:
Shashidhar Mysore, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Kaustav Banerjee, Timothy Sherwood, "3D Integration for Introspection," IEEE Micro, vol. 27, no. 1, pp. 77-83, Jan./Feb. 2007, doi:10.1109/MM.2007.1
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