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Designing a Crossbar Scheduler for HPC Applications
May/June 2006 (vol. 26 no. 3)
pp. 58-71
ASCII Text
x 
 
Cyriel Minkenberg, Fran?ois Abel, Peter M?, Raj Krishnamurthy, Mitchell Gusat, Peter Dill, Ilias Iliadis, Ronald Luijten, B. Roe Hemenway, Richard Grzybowski, Enrico Schiattarella, "Designing a Crossbar Scheduler for HPC Applications," IEEE Micro, vol. 26, no. 3, pp. 58-71, May/June, 2006.
 
 
BibTex
x
 
@article{ 10.1109/MM.2006.51,
author = {Cyriel Minkenberg and Fran?ois Abel and Peter M? and Raj Krishnamurthy and Mitchell Gusat and Peter Dill and Ilias Iliadis and Ronald Luijten and B. Roe Hemenway and Richard Grzybowski and Enrico Schiattarella},
title = {Designing a Crossbar Scheduler for HPC Applications},
journal ={IEEE Micro},
volume = {26},
number = {3},
issn = {0272-1732},
year = {2006},
pages = {58-71},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2006.51},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Designing a Crossbar Scheduler for HPC Applications
IS - 3
SN - 0272-1732
SP58
EP71
EPD - 58-71
A1 - Cyriel Minkenberg,
A1 - Fran?ois Abel,
A1 - Peter M?,
A1 - Raj Krishnamurthy,
A1 - Mitchell Gusat,
A1 - Peter Dill,
A1 - Ilias Iliadis,
A1 - Ronald Luijten,
A1 - B. Roe Hemenway,
A1 - Richard Grzybowski,
A1 - Enrico Schiattarella,
PY - 2006
KW - high-performance computing
KW - crossbar scheduler
KW - interconnection network
VL - 26
JA - IEEE Micro
ER -
 
Cyriel Minkenberg, IBM Zurich Research Laboratory
Fran?ois Abel, IBM Zurich Research Laboratory
Peter M?, IBM Zurich Research Laboratory
Raj Krishnamurthy, IBM Zurich Research Laboratory
Mitchell Gusat, IBM Zurich Research Laboratory
Peter Dill, IBM Zurich Research Laboratory
Ilias Iliadis, IBM Zurich Research Laboratory
Ronald Luijten, IBM Zurich Research Laboratory
B. Roe Hemenway, Corning Inc.
Richard Grzybowski, Corning Inc.
Enrico Schiattarella, Politecnico di Torino
A crucial part of any high-performance computing (HPC) system is its interconnection network. Corning and IBM are jointly developing a demonstration interconnect based on optical cell swtiching with electronic control. Key innovations in the scheduler architecture directly address the main HPC requirements: low latency, high throughput, efficient multicast suppot, and high reliability.
Index Terms:
high-performance computing, crossbar scheduler, interconnection network
Citation:
Cyriel Minkenberg, Fran?ois Abel, Peter M?, Raj Krishnamurthy, Mitchell Gusat, Peter Dill, Ilias Iliadis, Ronald Luijten, B. Roe Hemenway, Richard Grzybowski, Enrico Schiattarella, "Designing a Crossbar Scheduler for HPC Applications," IEEE Micro, vol. 26, no. 3, pp. 58-71, May/June 2006, doi:10.1109/MM.2006.51
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