Cell Multiprocessor Communication Network: Built for Speed

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May/June 2006 (vol. 26 no. 3)

pp. 10-23

	ASCII Text	x
	Michael Kistler, Michael Perrone, Fabrizio Petrini, "Cell Multiprocessor Communication Network: Built for Speed," IEEE Micro, vol. 26, no. 3, pp. 10-23, May/June, 2006.

	BibTex	x
	@article{ 10.1109/MM.2006.49, author = {Michael Kistler and Michael Perrone and Fabrizio Petrini}, title = {Cell Multiprocessor Communication Network: Built for Speed}, journal ={IEEE Micro}, volume = {26}, number = {3}, issn = {0272-1732}, year = {2006}, pages = {10-23}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2006.49}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - Cell Multiprocessor Communication Network: Built for Speed IS - 3 SN - 0272-1732 SP10 EP23 EPD - 10-23 A1 - Michael Kistler, A1 - Michael Perrone, A1 - Fabrizio Petrini, PY - 2006 KW - Cell Broadband Engine processor KW - multiprocessor communication network VL - 26 JA - IEEE Micro ER -

Michael Kistler, IBM Austin Research Laboratory

Michael Perrone, IBM TJ Watson Research Center

Fabrizio Petrini, Pacific Northwest National Laboratory

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2006.49

Multicore designs promise various power-performance and area-performance benefits. But inadequate design of the on-chip communication network can deprive applications of these benefits. To illuminate this important point in multicore processor design, the authors analyze the Cell processor's communication network, using a series of benchmarks involving DMA traffic patterns and synchronization protocols.

Index Terms:

Cell Broadband Engine processor, multiprocessor communication network

Citation:

Michael Kistler, Michael Perrone, Fabrizio Petrini, "Cell Multiprocessor Communication Network: Built for Speed," IEEE Micro, vol. 26, no. 3, pp. 10-23, May/June 2006, doi:10.1109/MM.2006.49

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