DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2006.23
On-chip networks are becoming increasingly popular as a way to connect high-performance single-chip computer systems, but thermal issues greatly limit network design. This thermal modeling and simulation framework combines with a distributed runtime scheme for thermal management to offer a path to thermally efficient on-chip network design.
Index Terms:
Temperature-aware, on-chip networks, thermal, thermal modeling, simulation framework, thermal management
Citation:
Li Shang, Li-Shiuan Peh, Amit Kumar, Niraj K. Jha, "Temperature-Aware On-Chip Networks," IEEE Micro, vol. 26, no. 1, pp. 130-139, Jan./Feb. 2006, doi:10.1109/MM.2006.23 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||