DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2006.11
Chip multiprocessors with thread-level speculation have become the subject of intense research. This work refutes the claim that such a design is necessarily too energy inefficient. In addition, it proposes out-of-order task spawning to exploit more sources of speculative task-level parallelism.
Index Terms:
Thread-level speculation, chip multiprocessors, out-of-order task spawning
Citation:
Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti R. Sarangi, James Tuck, Josep Torrellas, "Energy-Efficient Thread-Level Speculation," IEEE Micro, vol. 26, no. 1, pp. 80-91, Jan./Feb. 2006, doi:10.1109/MM.2006.11 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||