Look-Ahead Architecture Adaptation to Reduce Processor Power Consumption

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July/August 2005 (vol. 25 no. 4)

pp. 10-19

	ASCII Text	x
	Zhichun Zhu, Xiaodong Zhang, "Look-Ahead Architecture Adaptation to Reduce Processor Power Consumption," IEEE Micro, vol. 25, no. 4, pp. 10-19, July/August, 2005.

	BibTex	x
	@article{ 10.1109/MM.2005.70, author = {Zhichun Zhu and Xiaodong Zhang}, title = {Look-Ahead Architecture Adaptation to Reduce Processor Power Consumption}, journal ={IEEE Micro}, volume = {25}, number = {4}, issn = {0272-1732}, year = {2005}, pages = {10-19}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2005.70}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - Look-Ahead Architecture Adaptation to Reduce Processor Power Consumption IS - 4 SN - 0272-1732 SP10 EP19 EPD - 10-19 A1 - Zhichun Zhu, A1 - Xiaodong Zhang, PY - 2005 KW - Low-power design KW - Processor Architectures VL - 25 JA - IEEE Micro ER -

Zhichun Zhu, University of Illinois at Chicago

Xiaodong Zhang, College of William and Mary

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2005.70

An effective approach to reducing processor power consumption is to adaptively activate and deactivate hardware resources. The authors propose a look-ahead scheme that adjusts the processor issue rate triggered by main-memory accesses. This architecture-independent technique is particularly effective for memory-intensive applications. Combined with an existing technique based on IPC values, it also reduces power consumption for computation-intensive applications.

Index Terms:

Low-power design, Processor Architectures

Citation:

Zhichun Zhu, Xiaodong Zhang, "Look-Ahead Architecture Adaptation to Reduce Processor Power Consumption," IEEE Micro, vol. 25, no. 4, pp. 10-19, July/Aug. 2005, doi:10.1109/MM.2005.70

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