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Horus: Large-Scale Symmetric Multiprocessing for Opteron Systems
March/April 2005 (vol. 25 no. 2)
pp. 30-40
ASCII Text
x 
 
Rajesh Kota, Rich Oehler, "Horus: Large-Scale Symmetric Multiprocessing for Opteron Systems," IEEE Micro, vol. 25, no. 2, pp. 30-40, March/April, 2005.
 
 
BibTex
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@article{ 10.1109/MM.2005.28,
author = {Rajesh Kota and Rich Oehler},
title = {Horus: Large-Scale Symmetric Multiprocessing for Opteron Systems},
journal ={IEEE Micro},
volume = {25},
number = {2},
issn = {0272-1732},
year = {2005},
pages = {30-40},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2005.28},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Horus: Large-Scale Symmetric Multiprocessing for Opteron Systems
IS - 2
SN - 0272-1732
SP30
EP40
EPD - 30-40
A1 - Rajesh Kota,
A1 - Rich Oehler,
PY - 2005
KW - Computer System Implementation Multiprocessor Systems
VL - 25
JA - IEEE Micro
ER -
 
Rajesh Kota, Newisys Inc.
Rich Oehler, Newisys Inc.
Horus lets server vendors design up to 32-way Opteron systems. By implementing a local directory structure to filter unnecessary probes and by offering 64 Mbytes of remote data cache, the chip significantly reduces overall system traffic as well as the latency for a coherent HyperTransport transaction.
Index Terms:
Computer System Implementation Multiprocessor Systems
Citation:
Rajesh Kota, Rich Oehler, "Horus: Large-Scale Symmetric Multiprocessing for Opteron Systems," IEEE Micro, vol. 25, no. 2, pp. 30-40, Mar./Apr. 2005, doi:10.1109/MM.2005.28
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