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Memory Ordering: A Value-Based Approach
November/December 2004 (vol. 24 no. 6)
pp. 110-117
ASCII Text
x 
 
Harold W. Cain, Mikko H. Lipasti, "Memory Ordering: A Value-Based Approach," IEEE Micro, vol. 24, no. 6, pp. 110-117, November/December, 2004.
 
 
BibTex
x
 
@article{ 10.1109/MM.2004.81,
author = {Harold W. Cain and Mikko H. Lipasti},
title = {Memory Ordering: A Value-Based Approach},
journal ={IEEE Micro},
volume = {24},
number = {6},
issn = {0272-1732},
year = {2004},
pages = {110-117},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2004.81},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Memory Ordering: A Value-Based Approach
IS - 6
SN - 0272-1732
SP110
EP117
EPD - 110-117
A1 - Harold W. Cain,
A1 - Mikko H. Lipasti,
PY - 2004
VL - 24
JA - IEEE Micro
ER -
 
Harold W. Cain, IBM Research
Mikko H. Lipasti, University of Wisconsin
Value-based replay eliminates the need for content-addressable memories in the load queue, removing one barrier to scalable outof-order instruction windows. Instead, correct memory ordering is maintained by simply re-executing certain load instructions in program order. A set of novel filtering heuristics reduces the average additional cache bandwidth demanded by value-based replay to less than 3.5 percent.
Citation:
Harold W. Cain, Mikko H. Lipasti, "Memory Ordering: A Value-Based Approach," IEEE Micro, vol. 24, no. 6, pp. 110-117, Nov./Dec. 2004, doi:10.1109/MM.2004.81
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