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NePSim: A Network Processor Simulator with a Power Evaluation Framework
September/October 2004 (vol. 24 no. 5)
pp. 34-44
ASCII Text
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Yan Luo, Jun Yang, Laxmi N. Bhuyan, Li Zhao, "NePSim: A Network Processor Simulator with a Power Evaluation Framework," IEEE Micro, vol. 24, no. 5, pp. 34-44, September/October, 2004.
 
 
BibTex
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@article{ 10.1109/MM.2004.52,
author = {Yan Luo and Jun Yang and Laxmi N. Bhuyan and Li Zhao},
title = {NePSim: A Network Processor Simulator with a Power Evaluation Framework},
journal ={IEEE Micro},
volume = {24},
number = {5},
issn = {0272-1732},
year = {2004},
pages = {34-44},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2004.52},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - NePSim: A Network Processor Simulator with a Power Evaluation Framework
IS - 5
SN - 0272-1732
SP34
EP44
EPD - 34-44
A1 - Yan Luo,
A1 - Jun Yang,
A1 - Laxmi N. Bhuyan,
A1 - Li Zhao,
PY - 2004
VL - 24
JA - IEEE Micro
ER -
 
Yan Luo, University of California, Riverside
Jun Yang, University of California, Riverside
Laxmi N. Bhuyan, University of California, Riverside
Li Zhao, University of California, Riverside
This open-source integrated simulation infrastructure contains a cycle-accurate simulator for a typical network processor architecture, an automatic verification framework for testing and validation, and a power estimation model for measuring the simulated processor's power consumption.
Citation:
Yan Luo, Jun Yang, Laxmi N. Bhuyan, Li Zhao, "NePSim: A Network Processor Simulator with a Power Evaluation Framework," IEEE Micro, vol. 24, no. 5, pp. 34-44, Sep./Oct. 2004, doi:10.1109/MM.2004.52
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