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Measuring Architectural Vulnerability Factors
November/December 2003 (vol. 23 no. 6)
pp. 70-75
ASCII Text
x 
 
Shubhendu S. Mukherjee, Christopher T. Weaver, Joel Emer, Steven K. Reinhardt, Todd Austin, "Measuring Architectural Vulnerability Factors," IEEE Micro, vol. 23, no. 6, pp. 70-75, November/December, 2003.
 
 
BibTex
x
 
@article{ 10.1109/MM.2003.1261389,
author = {Shubhendu S. Mukherjee and Christopher T. Weaver and Joel Emer and Steven K. Reinhardt and Todd Austin},
title = {Measuring Architectural Vulnerability Factors},
journal ={IEEE Micro},
volume = {23},
number = {6},
issn = {0272-1732},
year = {2003},
pages = {70-75},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2003.1261389},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Measuring Architectural Vulnerability Factors
IS - 6
SN - 0272-1732
SP70
EP75
EPD - 70-75
A1 - Shubhendu S. Mukherjee,
A1 - Christopher T. Weaver,
A1 - Joel Emer,
A1 - Steven K. Reinhardt,
A1 - Todd Austin,
PY - 2003
VL - 23
JA - IEEE Micro
ER -
 
Christopher T. Weaver, Intel, University of Michigan
Joel Emer, Intel
Steven K. Reinhardt, Intel, University of Michigan
Todd Austin, University of Michigan

Processor designers need accurate estimates of soft-error rates early in the design cycle to make appropriate cost-reliability tradeoffs. Here, the authors present a method for estimating the architectural vulnerability factor—the probability that a fault in a particular structure will result in an error.

Citation:
Shubhendu S. Mukherjee, Christopher T. Weaver, Joel Emer, Steven K. Reinhardt, Todd Austin, "Measuring Architectural Vulnerability Factors," IEEE Micro, vol. 23, no. 6, pp. 70-75, Nov./Dec. 2003, doi:10.1109/MM.2003.1261389
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