A Programmable State Machine Architecture for Packet Processing

Micro
2003
Issue No. 4 - July/August
Abstract - A Programmable State Machine Architecture for Packet Processing

	This Article
	Subscribers, please Login Purchase article: $19 PDF HTML IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Wangyang Lai Articles by Chin-Tau Lea

July/August 2003 (vol. 23 no. 4)

pp. 32-42

	ASCII Text	x
	Wangyang Lai, Chin-Tau Lea, "A Programmable State Machine Architecture for Packet Processing," IEEE Micro, vol. 23, no. 4, pp. 32-42, July/August, 2003.

	BibTex	x
	@article{ 10.1109/MM.2003.1225965, author = {Wangyang Lai and Chin-Tau Lea}, title = {A Programmable State Machine Architecture for Packet Processing}, journal ={IEEE Micro}, volume = {23}, number = {4}, issn = {0272-1732}, year = {2003}, pages = {32-42}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2003.1225965}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Micro TI - A Programmable State Machine Architecture for Packet Processing IS - 4 SN - 0272-1732 SP32 EP42 EPD - 32-42 A1 - Wangyang Lai, A1 - Chin-Tau Lea, PY - 2003 VL - 23 JA - IEEE Micro ER -

Wangyang Lai, Agere Systems

Chin-Tau Lea, Hong Kong University of Science and Technology

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2003.1225965

Though complex and expensive, packet processors are programmable and can easily handle protocol changes. They are thus increasingly attractive for protocol processing.

Citation:

Wangyang Lai, Chin-Tau Lea, "A Programmable State Machine Architecture for Packet Processing," IEEE Micro, vol. 23, no. 4, pp. 32-42, July/Aug. 2003, doi:10.1109/MM.2003.1225965

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.