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39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06)
NoSQ: Store-Load Communication without a Store Queue
Orlando, Florida, USA
December 09-December 13
ISBN: 0-7695-2732-9
Tingting Sha, University of Pennsylvania
Milo M. K. Martin, University of Pennsylvania
Amir Roth, University of Pennsylvania

This paper presents NoSQ (short for No Store Queue), a microarchitecture that performs store-load communication without a store queue and without executing stores in the outof- order engine. NoSQ implements store-load communication using speculative memory bypassing (SMB), the dynamic short-circuiting of DEF-store-load-USE chains to DEF-USE chains. Whereas previous proposals used SMB as an opportunistic complement to conventional store queue-based forwarding, NoSQ uses SMB as a store queue replacement.

NoSQ relies on two supporting mechanisms. The first is an advanced store-load bypassing predictor that for a given dynamic load can predict whether that load will bypass and the identity of the communicating store. The second is an efficient verification mechanism for both bypassed and nonbpyassed loads using in-order load re-execution with an SMBaware store vulnerability window (SVW) filter.

The primary benefit of NoSQ is a simple, fast datapath that does not contain store-load forwarding hardware; all loads get their values either from the data cache or from the register file. Experiments show that this simpler design?despite being more speculative?slightly outperforms a conventional storequeue based design on most benchmarks (by 2% on average).

Citation:
Tingting Sha, Milo M. K. Martin, Amir Roth, "NoSQ: Store-Load Communication without a Store Queue," micro, pp.285-296, 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06), 2006
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