39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06) Managing Distributed, Shared L2 Caches through OS-Level Page Allocation Orlando, Florida, USA December 09-December 13 ISBN: 0-7695-2732-9
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MICRO.2006.31
This paper presents and studies a distributed L2 cache management approach through OS-level page allocation for future many-core processors. L2 cache management is a crucial multicore processor design aspect to overcome non-uniform cache access latency for good program performance and to reduce on-chip network traffic and related power consumption. Unlike previously studied hardwarebased private and shared cache designs implementing a "fixed" caching policy, the proposed OS-microarchitecture approach is flexible; it can easily implement a wide spectrum of L2 caching policies without complex hardware support. Furthermore, our approach can provide differentiated execution environment to running programs by dynamically controlling data placement and cache sharing degrees. We discuss key design issues of the proposed approach and present preliminary experimental results showing the promise of our approach.
Citation:
Sangyeun Cho, Lei Jin, "Managing Distributed, Shared L2 Caches through OS-Level Page Allocation," micro, pp.455-468, 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||