loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Test Data Volume Comparison: Monolithic vs. Modular SoC Testing
May/June 2009 (vol. 26 no. 3)
pp. 25-37
ASCII Text
x 
 
Ozgur Sinanoglu, Erik Jan Marinissen, Anuja Sehgal, Jeff Fitzgerald, Jeff Rearick, "Test Data Volume Comparison: Monolithic vs. Modular SoC Testing," IEEE Design and Test of Computers, vol. 26, no. 3, pp. 25-37, May/June, 2009.
 
 
BibTex
x
 
@article{ 10.1109/MDT.2009.65,
author = {Ozgur Sinanoglu and Erik Jan Marinissen and Anuja Sehgal and Jeff Fitzgerald and Jeff Rearick},
title = {Test Data Volume Comparison: Monolithic vs. Modular SoC Testing},
journal ={IEEE Design and Test of Computers},
volume = {26},
number = {3},
issn = {0740-7475},
year = {2009},
pages = {25-37},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2009.65},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Test Data Volume Comparison: Monolithic vs. Modular SoC Testing
IS - 3
SN - 0740-7475
SP25
EP37
EPD - 25-37
A1 - Ozgur Sinanoglu,
A1 - Erik Jan Marinissen,
A1 - Anuja Sehgal,
A1 - Jeff Fitzgerald,
A1 - Jeff Rearick,
PY - 2009
KW - modular testing
KW - monolithic testing
KW - IEEE Std 1500
KW - test data volume
KW - SoC testing
KW - test application time
KW - logic cores
VL - 26
JA - IEEE Design and Test of Computers
ER -
 

Editor's note:

Containing production cost is a major concern for today's complex SoCs. One of the key contributors to production cost is test time and test data volume, for which numerous compression techniques were proposed. This article introduces a different approach to test data volume reduction, namely the use of modular test based on IEEE Std 1500 architecture, and it provides modeling, analysis, and quantification to support the proposed approach.

—Yervant Zorian, VirageLogic

1. Y. Zorian, E.J. Marinissen, and S. Dey, "Testing Embedded-Core Based System Chips," Proc. Int'l Test Conf. (ITC 98), IEEE CS Press, 1998, pp. 130-143.
2. O. Sinanoglu and E.J. Marinissen, "Analysis of the Test Data Volume Reduction Benefit of Modular SoC Testing," Proc. Design, Automation and Test in Europe Conf. (DATE 08), IEEE CS Press, 2008, pp. 182-187.
3. A. Sehgal, J. Fitzgerald, and J. Rearick, "Test Cost Reduction for the AMD Athlon Processor Using Test Partitioning," Proc. Int'l Test Conf. (ITC 07), IEEE CS Press, 2007, paper 1.3.
4. F. Brglez, D. Bryan, and K. Kozminski, "Combinational Profiles of Sequential Benchmark Circuits," Proc. Int'l Symp. Circuits and Systems (ISCAS 89), vol. 14, no. 2, IEEE Press, 1989, pp. 1929-1934.
5. E.J. Marinissen, V. Iyengar, and K. Chakrabarty, "A Set of Benchmarks for Modular Testing of SoCs," Proc. Int'l Test Conf. (ITC 02), IEEE CS Press, 2002, pp. 519-528.
6. M.L. Bushnell and V.D. Agrawal, Essentials of Electronic Testing for Digital Memory &Mixed-Signal VLSI Circuits, Series: Frontiers in Electronics Testing, Kluwer Academic Publishers, 2000.
7. S.K. Goel and E.J. Marinissen, "SoC Test Architecture Design for Efficient Utilization of Test Bandwidth," ACM Trans. Design Automation of Electronic Systems, vol. 8, no. 4, 2003, pp. 399-429.

Index Terms:
modular testing, monolithic testing, IEEE Std 1500, test data volume, SoC testing, test application time, logic cores
Citation:
Ozgur Sinanoglu, Erik Jan Marinissen, Anuja Sehgal, Jeff Fitzgerald, Jeff Rearick, "Test Data Volume Comparison: Monolithic vs. Modular SoC Testing," IEEE Design and Test of Computers, vol. 26, no. 3, pp. 25-37, May/June 2009, doi:10.1109/MDT.2009.65
Usage of this product signifies your acceptance of the Terms of Use.