Supply current and power dissipation during scan-based test can be far higher than during normal circuit operation, owing to excessive switching activity caused by the tests. Excessive switching activity can occur during scan shift and test response capture. Higher peak-current demands can cause supply voltage droops, making good chips fail at-speed tests. Higher average switching activity causes higher power dissipation and chip temperature, which in turn can cause hot spots and damage circuits under test. This article investigates a method to derive tests with reduced switching activity during scan shift and test response capture. The method does not require additional hardware or modifications to the scan chains. The authors present experimental results on benchmark and industrial circuits.