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Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array
May/June 2006 (vol. 23 no. 3)
pp. 212-219
ASCII Text
x 
 
Dong Gun Kam, Joungho Kim, Jiheon Yu, Ho Choi, Kicheol Bae, Choonheung Lee, "Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array," IEEE Design and Test of Computers, vol. 23, no. 3, pp. 212-219, May/June, 2006.
 
 
BibTex
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@article{ 10.1109/MDT.2006.78,
author = {Dong Gun Kam and Joungho Kim and Jiheon Yu and Ho Choi and Kicheol Bae and Choonheung Lee},
title = {Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array},
journal ={IEEE Design and Test of Computers},
volume = {23},
number = {3},
issn = {0740-7475},
year = {2006},
pages = {212-219},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2006.78},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array
IS - 3
SN - 0740-7475
SP212
EP219
EPD - 212-219
A1 - Dong Gun Kam,
A1 - Joungho Kim,
A1 - Jiheon Yu,
A1 - Ho Choi,
A1 - Kicheol Bae,
A1 - Choonheung Lee,
PY - 2006
KW - wire bonded plastic ball grid array
KW - WB-PBGA
KW - 40 Gb/s Serial Link
KW - chip-to-chip serial link
KW - SiP
KW - System-in-Package
VL - 23
JA - IEEE Design and Test of Computers
ER -
 
Dong Gun Kam, Korea Advanced Institute of Science and Technology
Joungho Kim, Korea Advanced Institute of Science and Technology
Jiheon Yu, Amkor Technology Korea
Ho Choi, Amkor Technology Korea
Kicheol Bae, Amkor Technology Korea
Choonheung Lee, Amkor Technology Korea
Editor's note: System-in-package provides highly integrated packaging with high-speed performance. Many SiP packages contain low-cost 3D stacked chips interconnected by fine wire bonds. In a high-frequency spectrum, these wire bonds can cause discontinuities causing signal degradation. This article addresses problems with wire-bonding in high-frequency SiP packages and proposes design methodologies to reduce these discontinuities.
Index Terms:
wire bonded plastic ball grid array, WB-PBGA, 40 Gb/s Serial Link, chip-to-chip serial link, SiP, System-in-Package
Citation:
Dong Gun Kam, Joungho Kim, Jiheon Yu, Ho Choi, Kicheol Bae, Choonheung Lee, "Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array," IEEE Design and Test of Computers, vol. 23, no. 3, pp. 212-219, May/June 2006, doi:10.1109/MDT.2006.78
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