A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs

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	Similar Articles Articles by Vincent Kerz?rho Articles by Philippe Cauvet Articles by Serge Bernard Articles by Florence Aza? Articles by Mariane Comte Articles by Michel Renovell

May/June 2006 (vol. 23 no. 3)

pp. 234-243

	ASCII Text	x
	Vincent Kerz?rho, Philippe Cauvet, Serge Bernard, Florence Aza?, Mariane Comte, Michel Renovell, "A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs," IEEE Design and Test of Computers, vol. 23, no. 3, pp. 234-243, May/June, 2006.

	BibTex	x
	@article{ 10.1109/MDT.2006.59, author = {Vincent Kerz?rho and Philippe Cauvet and Serge Bernard and Florence Aza? and Mariane Comte and Michel Renovell}, title = {A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs}, journal ={IEEE Design and Test of Computers}, volume = {23}, number = {3}, issn = {0740-7475}, year = {2006}, pages = {234-243}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2006.59}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Design and Test of Computers TI - A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs IS - 3 SN - 0740-7475 SP234 EP243 EPD - 234-243 A1 - Vincent Kerz?rho, A1 - Philippe Cauvet, A1 - Serge Bernard, A1 - Florence Aza?, A1 - Mariane Comte, A1 - Michel Renovell, PY - 2006 KW - ADC KW - DAC KW - mixed-signal testing KW - DFT KW - SiP KW - system-in-package VL - 23 JA - IEEE Design and Test of Computers ER -

Vincent Kerz?rho, Philips Semiconductors and LIRMM

Philippe Cauvet, Philips Semiconductors

Serge Bernard, LIRMM

Florence Aza?, LIRMM

Mariane Comte, LIRMM

Michel Renovell, LIRMM

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2006.59

Editor's note: Testing mixed-signal circuits remains one of the most difficult challenges within the semiconductor industry. In this article, the authors present a novel DFT technique to test sets of ADCs and DACs embedded in a complex SiP. The technique provides fully digital testing on the converters to significantly reduce the cost of testing.

Index Terms:

ADC, DAC, mixed-signal testing, DFT, SiP, system-in-package

Citation:

Vincent Kerz?rho, Philippe Cauvet, Serge Bernard, Florence Aza?, Mariane Comte, Michel Renovell, "A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs," IEEE Design and Test of Computers, vol. 23, no. 3, pp. 234-243, May/June 2006, doi:10.1109/MDT.2006.59

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