DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2006.20
Editor's note: Handling component mismatch represents a great challenge in analog and even digital design for current and future submicron technologies. This article, a special selection from the Symposium on Integrated Circuits and Systems Design (SBCCI), presents a matching model to help designers account for real effects while maintaining simplicity and easing the design effort. --Luigi Carro, Federal University of Rio Grande do Sul
Index Terms:
MOSFET, matching, integrated circuit design, simulation, mismatch compact model
Citation:
Hamilton Klimach, Carlos Galup-Montoro, M?rcio C. Schneider, Alfredo Arnaud, "MOSFET Mismatch Modeling: A New Approach," IEEE Design and Test of Computers, vol. 23, no. 1, pp. 20-29, Jan./Feb. 2006, doi:10.1109/MDT.2006.20 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||