Seven Strategies for Tolerating Highly Defective Fabrication

Design&Test
2005
Issue No. 4 - July/August
Abstract - Seven Strategies for Tolerating Highly Defective Fabrication

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July/August 2005 (vol. 22 no. 4)

pp. 306-315

	ASCII Text	x
	Andr? DeHon, Helia Naeimi, "Seven Strategies for Tolerating Highly Defective Fabrication," IEEE Design and Test of Computers, vol. 22, no. 4, pp. 306-315, July/August, 2005.

	BibTex	x
	@article{ 10.1109/MDT.2005.94, author = {Andr? DeHon and Helia Naeimi}, title = {Seven Strategies for Tolerating Highly Defective Fabrication}, journal ={IEEE Design and Test of Computers}, volume = {22}, number = {4}, issn = {0740-7475}, year = {2005}, pages = {306-315}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2005.94}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Design and Test of Computers TI - Seven Strategies for Tolerating Highly Defective Fabrication IS - 4 SN - 0740-7475 SP306 EP315 EPD - 306-315 A1 - Andr? DeHon, A1 - Helia Naeimi, PY - 2005 KW - Redundant design KW - Reconfigurable hardware KW - Built-in tests KW - Reliability KW - Testing KW - and Fault-Tolerance KW - Testing strategies KW - integrated circuits KW - Logic Arrays KW - Advanced Technologies VL - 22 JA - IEEE Design and Test of Computers ER -

Andr? DeHon, California Institute of Technology

Helia Naeimi, California Institute of Technology

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2005.94

To tolerate defects in molecular electronics, the authors propose techniques to bypass defective resources during the logic mapping phase. These techniques take advantage of intrinsic redundancy in molecular crossbars to tolerate defective nanowires and nanocrossbars. The proposed greedy mapping algorithm can tolerate a defect density of 10% with very low area overheads.

Index Terms:

Redundant design, Reconfigurable hardware, Built-in tests, Reliability, Testing, and Fault-Tolerance, Testing strategies, integrated circuits, Logic Arrays, Advanced Technologies

Citation:

Andr? DeHon, Helia Naeimi, "Seven Strategies for Tolerating Highly Defective Fabrication," IEEE Design and Test of Computers, vol. 22, no. 4, pp. 306-315, July/Aug. 2005, doi:10.1109/MDT.2005.94

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