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X-Tolerant Test Response Compaction
November/December 2005 (vol. 22 no. 6)
pp. 566-574
ASCII Text
x 
 
Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher, Nishant Patil, "X-Tolerant Test Response Compaction," IEEE Design and Test of Computers, vol. 22, no. 6, pp. 566-574, November/December, 2005.
 
 
BibTex
x
 
@article{ 10.1109/MDT.2005.154,
author = {Subhasish Mitra and Steven S. Lumetta and Michael Mitzenmacher and Nishant Patil},
title = {X-Tolerant Test Response Compaction},
journal ={IEEE Design and Test of Computers},
volume = {22},
number = {6},
issn = {0740-7475},
year = {2005},
pages = {566-574},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2005.154},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - X-Tolerant Test Response Compaction
IS - 6
SN - 0740-7475
SP566
EP574
EPD - 566-574
A1 - Subhasish Mitra,
A1 - Steven S. Lumetta,
A1 - Michael Mitzenmacher,
A1 - Nishant Patil,
PY - 2005
KW - VLSI Test
KW - Testability
KW - Built-In Test
VL - 22
JA - IEEE Design and Test of Computers
ER -
 
Steven S. Lumetta, University of Illinois at Urbana-Champaign
Michael Mitzenmacher, Harvard University
Larger, denser designs lead to more defects; higher quality requirements and new test methods lead to an explosion in test data volume. Test compression techniques attempt to do more testing with fewer bits. This article summarizes one such method, X-compact, which addresses how unknowns, the bane of compression and logic BIST techniques, are eliminated.
Index Terms:
VLSI Test, Testability, Built-In Test
Citation:
Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher, Nishant Patil, "X-Tolerant Test Response Compaction," IEEE Design and Test of Computers, vol. 22, no. 6, pp. 566-574, Nov./Dec. 2005, doi:10.1109/MDT.2005.154
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