Infrastructure IP design for repair in nanometer technologies

Design&Test
2005
Issue No. 1 - January/February
Abstract - Infrastructure IP design for repair in nanometer technologies

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January/February 2005 (vol. 22 no. 1)

pp. 17

	ASCII Text	x
	R. Chandramouli, "Infrastructure IP design for repair in nanometer technologies," IEEE Design and Test of Computers, vol. 22, no. 1, pp. 17, January/February, 2005.

	BibTex	x
	@article{ 10.1109/MDT.2005.13, author = {R. Chandramouli}, title = {Infrastructure IP design for repair in nanometer technologies}, journal ={IEEE Design and Test of Computers}, volume = {22}, number = {1}, issn = {0740-7475}, year = {2005}, pages = {17}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2005.13}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Design and Test of Computers TI - Infrastructure IP design for repair in nanometer technologies IS - 1 SN - 0740-7475 SP EP EPD - 17 A1 - R. Chandramouli, PY - 2005 VL - 22 JA - IEEE Design and Test of Computers ER -

R. Chandramouli, Virage Logic

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2005.13

Citation:

R. Chandramouli, "Infrastructure IP design for repair in nanometer technologies," IEEE Design and Test of Computers, vol. 22, no. 1, pp. 17, Jan./Feb. 2005, doi:10.1109/MDT.2005.13

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