Analysis and Implementation of Practical, Cost-Effective Networks on Chips September/October 2005 (vol. 22 no. 5) pp. 422-433
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MDT.2005.103
This article describes design issues in three chips that exploit star and meshnetworks, with the objective of comparing area and energy costs. The authorspresent new solutions based on mesochronous communication and burstpacket transactions.
Index Terms:
Advanced technologies, Network connectivity chips, VLSI
Citation:
Se-Joong Lee, Kangmin Lee, Hoi-Jun Yoo, "Analysis and Implementation of Practical, Cost-Effective Networks on Chips," IEEE Design and Test of Computers, vol. 22, no. 5, pp. 422-433, Sep./Oct. 2005, doi:10.1109/MDT.2005.103 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||