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On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz
July/August 2004 (vol. 21 no. 4)
pp. 314-321
ASCII Text
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Stephen Sunter, Aubin Roy, "On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz," IEEE Design and Test of Computers, vol. 21, no. 4, pp. 314-321, July/August, 2004.
 
 
BibTex
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@article{ 10.1109/MDT.2004.38,
author = {Stephen Sunter and Aubin Roy},
title = {On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz},
journal ={IEEE Design and Test of Computers},
volume = {21},
number = {4},
issn = {0740-7475},
year = {2004},
pages = {314-321},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2004.38},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz
IS - 4
SN - 0740-7475
SP314
EP321
EPD - 314-321
A1 - Stephen Sunter,
A1 - Aubin Roy,
PY - 2004
VL - 21
JA - IEEE Design and Test of Computers
ER -
 
Stephen Sunter, LogicVision
Aubin Roy, LogicVision
One of the challenges of testing at multiGbps rates is jitter characterization. This article introduces a new technique that allows for attaining on-chip measurements at a substantial level of accuracy. The authors propose new algorithms that allow a wide frequency range, supporting the desired accuracy while guaranteeing signal integrity and low overhead.
Citation:
Stephen Sunter, Aubin Roy, "On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz," IEEE Design and Test of Computers, vol. 21, no. 4, pp. 314-321, July/Aug. 2004, doi:10.1109/MDT.2004.38
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