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Impact of Design-Manufacturing Interface on SoC Design Methodologies
May/June 2004 (vol. 21 no. 3)
pp. 183-191
ASCII Text
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Juan-Antonio Carballo, Sani R. Nassif, "Impact of Design-Manufacturing Interface on SoC Design Methodologies," IEEE Design and Test of Computers, vol. 21, no. 3, pp. 183-191, May/June, 2004.
 
 
BibTex
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@article{ 10.1109/MDT.2004.13,
author = {Juan-Antonio Carballo and Sani R. Nassif},
title = {Impact of Design-Manufacturing Interface on SoC Design Methodologies},
journal ={IEEE Design and Test of Computers},
volume = {21},
number = {3},
issn = {0740-7475},
year = {2004},
pages = {183-191},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2004.13},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Impact of Design-Manufacturing Interface on SoC Design Methodologies
IS - 3
SN - 0740-7475
SP183
EP191
EPD - 183-191
A1 - Juan-Antonio Carballo,
A1 - Sani R. Nassif,
PY - 2004
VL - 21
JA - IEEE Design and Test of Computers
ER -
 
Juan-Antonio Carballo, IBM Research
Sani R. Nassif, IBM Research
Today's semiconductor manufacturing trends are increasingly influencing hardware design techniques, tools, and methodologies. This article analyzes these trends and describes their effects on design methodologies. These effects clearly include impacts on yield optimization, resolution enhancement, testability, and cost.
Citation:
Juan-Antonio Carballo, Sani R. Nassif, "Impact of Design-Manufacturing Interface on SoC Design Methodologies," IEEE Design and Test of Computers, vol. 21, no. 3, pp. 183-191, May/June 2004, doi:10.1109/MDT.2004.13
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