Minimizing Pattern Count for Interconnect Test under a Ground Bounce Constraint March/April 2003 (vol. 20 no. 2) pp. 8-18
Editor?s note: When testing the interconnect structures on a board, test programmers sometimes ask, How can I control the test pattern generation process to avoid ground bounce problems during Extest mode? Those wishing to satisfy a simultaneously-switching-outputs constraint will find several new solutions in this article. --Monica Lobetti-Bodoni Siemens Mobile Communications
Citation:
Erik Jan Marinissen, Bart Vermeulen, Henk Hollmann, R.G.(Ben) Bennetts, "Minimizing Pattern Count for Interconnect Test under a Ground Bounce Constraint," IEEE Design and Test of Computers, vol. 20, no. 2, pp. 8-18, Mar./Apr. 2003, doi:10.1109/MDT.2003.1188257 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||