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Extending OPMISR beyond 10x Scan Test Efficiency
September/October 2002 (vol. 19 no. 5)
pp. 65-72

Rapidly increasing ASIC gate counts are stressing the test capacity of manufacturing test equipment. New on-product multiple-input signature register (OPMISR) techniques compress test vectors produced by ATPG, substantially reducing data volume and test time.

Citation:
Carl Barnhart, Vanessa Brunkhorst, Frank Distler, Owen Farnsworth, Andrew Ferko, Brion Keller, David Scott, Bernd Koenemann, Takeshi Onodera, "Extending OPMISR beyond 10x Scan Test Efficiency," IEEE Design and Test of Computers, vol. 19, no. 5, pp. 65-72, Sep./Oct. 2002, doi:10.1109/MDT.2002.1033794
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