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Embedded Robustness IPs for Transient-Error-Free ICs
May/June 2002 (vol. 19 no. 3)
pp. 56-70
ASCII Text
x 
 
Eric Dupont, Michael Nicolaidis, Peter Rohr, "Embedded Robustness IPs for Transient-Error-Free ICs," IEEE Design and Test of Computers, vol. 19, no. 3, pp. 56-70, May/June, 2002.
 
 
BibTex
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@article{ 10.1109/MDT.2002.1003798,
author = {Eric Dupont and Michael Nicolaidis and Peter Rohr},
title = {Embedded Robustness IPs for Transient-Error-Free ICs},
journal ={IEEE Design and Test of Computers},
volume = {19},
number = {3},
issn = {0740-7475},
year = {2002},
pages = {56-70},
doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2002.1003798},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design and Test of Computers
TI - Embedded Robustness IPs for Transient-Error-Free ICs
IS - 3
SN - 0740-7475
SP56
EP70
EPD - 56-70
A1 - Eric Dupont,
A1 - Michael Nicolaidis,
A1 - Peter Rohr,
PY - 2002
VL - 19
JA - IEEE Design and Test of Computers
ER -
 

Shrinking process geometries will make it imperative for designers to start paying attention to transient-error protection. Self-correcting intelligence embedded in ICs protects electronic systems against such unpredictable and insidious errors. Infrastructure IPs that focus on transient faults are a leading type of self-correcting intelligence.

Citation:
Eric Dupont, Michael Nicolaidis, Peter Rohr, "Embedded Robustness IPs for Transient-Error-Free ICs," IEEE Design and Test of Computers, vol. 19, no. 3, pp. 56-70, May/June 2002, doi:10.1109/MDT.2002.1003798
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