Multiprocessor system on chip designs use complex on-chip networks to integrate different programmable processor cores, specialized memories, and other components on a single chip. MpSoCs have become the architecture of choice in many industries. Their heterogeneity inevitably increases with intellectual-property integration and component specialization. System integration is becoming a major challenge in their design. Simulation is state of the art in MpSoC performance verification, but it has conceptual disadvantages that become disabling as complexity increases. Formal approaches offer a systematic alternative.
Citation:
Kai Richter, Marek Jersak, Rolf Ernst, "A Formal Approach to MpSoC Performance Verification," Computer, vol. 36, no. 4, pp. 60-67, Apr. 2003, doi:10.1109/MC.2003.1193230 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||