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13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
SMART: A Simulation Tool for Analyzing Cache Access Behavior on SMPs
Atlanta, Georgia
September 27-September 29
ISBN: 0-7695-2458-3
ASCII Text
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Tianchao Li, Michael Gerndt, "SMART: A Simulation Tool for Analyzing Cache Access Behavior on SMPs," Modeling, Analysis, and Simulation of Computer Systems, International Symposium on, pp. 525-528, 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, 2005.
 
 
BibTex
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@article{ 10.1109/MASCOT.2005.67,
author = {Tianchao Li and Michael Gerndt},
title = {SMART: A Simulation Tool for Analyzing Cache Access Behavior on SMPs},
journal ={Modeling, Analysis, and Simulation of Computer Systems, International Symposium on},
volume = {0},
year = {2005},
issn = {1526-7539},
pages = {525-528},
doi = {http://doi.ieeecomputersociety.org/10.1109/MASCOT.2005.67},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Modeling, Analysis, and Simulation of Computer Systems, International Symposium on
TI - SMART: A Simulation Tool for Analyzing Cache Access Behavior on SMPs
SN - 1526-7539
SP525
EP528
A1 - Tianchao Li,
A1 - Michael Gerndt,
PY - 2005
KW - null
VL - 0
JA - Modeling, Analysis, and Simulation of Computer Systems, International Symposium on
ER -
 
Tianchao Li, Institut fur Informatik, Technische Universitat Munchen Boltzmannstr. 3, D-85748 Garching bei M?unchen, Germany
Michael Gerndt, Institut fur Informatik, Technische Universitat Munchen Boltzmannstr. 3, D-85748 Garching bei M?unchen, Germany

This paper presents SMART - a simulation tool for analyzing the cache access behavior on SMP systems. SMART traps memory access events of multi-threaded applications, simulates the accesses in multiple levels of caches of multiple processors and the shared memory, emulates a novel hardware monitor that records events within given address ranges of interest, and presents the result as event counts or histogram in arbitrary granularity. Used independently or together with the advanced tools developed in the EPCache project, SMART can help evaluate the performance of multi-threaded applications with different hardware con- figurations and facilitate the application of effective code transformations for optimization.

Citation:
Tianchao Li, Michael Gerndt, "SMART: A Simulation Tool for Analyzing Cache Access Behavior on SMPs," mascots, pp.525-528, 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, 2005
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