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Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)
Sigma-Delta Noise Shaping for Digital-to-Frequency and Digital-to-RF-Amplitude Conversion
Banff, Alberta, Canada
July 20-July 24
ISBN: 0-7695-2403-6
Robert Bogdan Staszewski, Texas Instruments Inc
Sameh Rezeq, Texas Instruments Inc
Chih-Ming Hung, Texas Instruments Inc
Patrick Cruise, Texas Instruments Inc
John Wallberg, Texas Instruments Inc
In this paper, we describe a new architecture of high-speed multibit ?. noise shaping for digital-to-frequency conversion (DFC) and digital-to-RF-amplitude conversion (DRAC). The DFC and DRAC are instrumental in performing phase modulation (PM) and amplitude modulation (AM) of an RF polar transmitter. Since current biasing and continuous-time analog filtering of a conventional transmit modulator are avoided in this all-digital architecture, it is amenable to large-scale integration in an SoC realized in a digital deep-submicron CMOS process. The approach is demonstrated in the first single-chip fully-compliant GSM/EDGE transceiver realized in 90-nm CMOS.
Citation:
Robert Bogdan Staszewski, Sameh Rezeq, Chih-Ming Hung, Patrick Cruise, John Wallberg, "Sigma-Delta Noise Shaping for Digital-to-Frequency and Digital-to-RF-Amplitude Conversion," iwsoc, pp.154-159, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005
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