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Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)
A Temperature, Supply Voltage Compensated Floating-Gate MOS Dosimeter Using V_TH Extractor
Banff, Alberta, Canada
July 20-July 24
ISBN: 0-7695-2403-6
ASCII Text
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Yanjie Wang, Yanbin Wang, Garry Tarr, Kris Iniewski, "A Temperature, Supply Voltage Compensated Floating-Gate MOS Dosimeter Using V_TH Extractor," System-on-Chip for Real-Time Applications, International Workshop on, pp. 176-179, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005.
 
 
BibTex
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@article{ 10.1109/IWSOC.2005.30,
author = {Yanjie Wang and Yanbin Wang and Garry Tarr and Kris Iniewski},
title = {A Temperature, Supply Voltage Compensated Floating-Gate MOS Dosimeter Using V_TH Extractor},
journal ={System-on-Chip for Real-Time Applications, International Workshop on},
volume = {0},
year = {2005},
isbn = {0-7695-2403-6},
pages = {176-179},
doi = {http://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.30},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - System-on-Chip for Real-Time Applications, International Workshop on
TI - A Temperature, Supply Voltage Compensated Floating-Gate MOS Dosimeter Using V_TH Extractor
SN - 0-7695-2403-6
SP176
EP179
A1 - Yanjie Wang,
A1 - Yanbin Wang,
A1 - Garry Tarr,
A1 - Kris Iniewski,
PY - 2005
KW - null
VL - 0
JA - System-on-Chip for Real-Time Applications, International Workshop on
ER -
 
Yanjie Wang, University of Alberta
Yanbin Wang, Carleton University
Garry Tarr, Carleton University
Kris Iniewski, University of Alberta
A temperature and supply voltage compensated floating-gate MOSFET dosimeter is presented. The dosimeter consists of two pairs of floating-gate sensor transistors with identical geometry for compensation purpose, V_TH (threshold voltage) extractor circuits and substractors. The dosimeter output presents the threshold voltage changes of the floating-gate MOSFET sensors before and after radiation. The circuit has been modeled and simulated in Hspice using TSMC 0.35?m CMOS technology at 2.4V power supply. Simulated results show a low sensitivity to temperature and V_DD variations and a low power consumption of 0.44mW.
Citation:
Yanjie Wang, Yanbin Wang, Garry Tarr, Kris Iniewski, "A Temperature, Supply Voltage Compensated Floating-Gate MOS Dosimeter Using V_TH Extractor," iwsoc, pp.176-179, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005
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