Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) A Multivalue Eigenvalue Based Circuit Partitioning Technique Banff, Alberta, Canada July 20-July 24 ISBN: 0-7695-2403-6
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.17
VLSI circuit partitioning is an important step in the physical design of integrated circuits. In VLSI partitioning, a circuit is partitioned into smaller relatively independent sub-circuits. In this paper we present an eigenvalue based multilevel partitioning algorithm. The proposed method uses a matrix re-ordering technique to produce a minimal bandwidth matrix, relying upon matrix sparsity. The reordering technique is applied to the connectivity matrix of a clustered circuit and the matrix connectivity information is obtained. This connectivity information is used to partition the circuit. The experimental results demonstrate the technique?s effectiveness against flat partitioning algorithms.
Citation:
Blair Schiffner, Jianhua Li, Laleh Behjat, "A Multivalue Eigenvalue Based Circuit Partitioning Technique," iwsoc, pp.312-316, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||