In this paper we propose a new specification and simulation modeling methodology that supports the application of transactional level modeling in the design cycle of Hardware/Software (Hw/Sw) systems allowing the exploration and validation of design alternatives at high levels of abstraction. The proposed methodology offers a possibility to unify functional and non-functional aspects of the system yielding to a holistic approach in specification modeling and simulation. We provide a general approach in system specification that separates three modeling aspects: a computational model, a language used for the functional specification and simulator semantics and implementation. This enables model reusability, design space exploration and specification relatively independent from Hw/Sw description languages.